library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity blikac is generic ( size : integer := 8); Port ( CLK : in std_logic; SWITCH_LED : in std_logic; RESET : in std_logic; LIGHT_POS : out std_logic_vector(size-1 downto 0) ); end blikac; architecture Behavioral of blikac is signal SHIFT_VALUE : std_logic_vector(size-1 downto 0) := B"0000_0001"; begin light_position: process (CLK, SWITCH_LED, RESET, SHIFT_VALUE) variable counter : natural range 0 to 7; variable direction : bit; -- 0 UP / 1 DOWN begin if RESET='1' then SHIFT_VALUE <= B"0000_0001"; direction := '0'; counter := 0; elsif CLK='1' and CLK'EVENT then if SWITCH_LED='1' then if direction = '0' then SHIFT_VALUE <= SHIFT_VALUE(size - 2 downto 0) & '0'; counter := counter + 1; if counter = 7 then direction := '1'; end if; else SHIFT_VALUE <= '0' & SHIFT_VALUE(size - 1 downto 1); counter := counter - 1; if counter = 0 then direction := '0'; end if; end if; end if; end if; LIGHT_POS <= SHIFT_VALUE; end process; end Behavioral;